The present invention relates generally to the field of integrated circuits, and more particularly to generating a layout for an integrated circuit for manufacturing the integrated circuit.
In integrated circuits some components, such as flip flops, are provided with a clocking signal in order to switch the states of the flip flop according to the states of the inputs of the flip flops. To ensure that all the components on an integrated circuit are provided with the same clocking signal, basically two approaches are known. In a first approach, the clocking signal is generated by a single clock whereupon the clocking signal is spread into a tree like structure of individual clocking areas. As the electrical components of the clocking areas have to be switched at the same time, the clocking signal provided to the clocking areas are synchronized.
The synchronization of the clocking signal may, however, be omitted when the second approach for providing a clocking signal is chosen. In the second approach, the clocking signal is again generated by a single clock and spread into a plurality of “branches” of a tree-like structure. The individual branches are connected to a clock grid (clock mesh), which is spread over the entire chip that the integrated circuit is placed on. As a result, the clocking signal is fed into the clock grid.
In order to reduce the amount of energy that has to be fed into the clock grid to supply the clock grid with the clocking signal, the principle of “resonant clocking” has been introduced. In “resonant clocking,” a plurality of resonators are connected to the clock grid to keep at least some of the energy that has been coupled into the clock grid oscillating in the clock grid. As a result, the amount of energy that has to be fed into the clock grid to maintain the clocking signal within the clock grid is reduced.